Information processing system including device provided with circuit capable of configuring logic circuit according to circuit information and plurality of control units

ABSTRACT

An information processing system includes a device including a circuit for configuring a logic circuit according to circuit information, a first control unit configured to process a first job by using a first logic circuit configured in the circuit according to first circuit information, the first control unit being connected to the device, and a second control unit configured to process a second job by using a second logic circuit configured in the circuit according to second circuit information, the second control unit being connected to the device, wherein the device can configure a logic circuit in the circuit according to circuit information transmitted from the first control unit, and wherein the first control unit transmits the first circuit information to the device to configure the first logic circuit in the circuit, and transmits the second circuit information to the device to configure the second logic circuit in the circuit.

BACKGROUND OF THE INVENTION

Field of the Invention

One disclosed aspect of the embodiments relates an informationprocessing system which includes a device and a plurality of controlunits, the device including a circuit capable of configuring a logiccircuit according to circuit information.

Description of the Related Art

Programmable logic devices capable of changing an internal logic circuitconfiguration, such as a complex programmable logic device (CPLD) and afield programmable gate array (FPGA), are known. For example, an FPGAtypically includes a fabric and a configuration memory. The fabricincludes a plurality of logic blocks and a wiring area between the logicblocks. The FPGA includes an interface for transferring data between aninside and outside of the FPGA. Configuration data (also referred to ascircuit information) can be written into the configuration memory tomake the fabric (plurality of logic blocks) function as various logiccircuits. The writing of circuit information to cause the fabric tofunction as a logic circuit will be referred to as configuration of theFPGA.

The FPGA fabric can implement various functions by configuration, canthus achieve both the high-speed performance of hardware and theflexibility of software in a compatible manner. Japanese PatentApplication Laid-Open No. 2008-287571 discusses a system in which aplurality of central processing units (CPUs) shares a configured FPGA.

Some programmable logic devices include an intellectual property (IP)core (hereinafter, referred to as port) of a bus interface (for example,Peripheral Component Interconnect Express (PCI Express, or PCIe) bus)for achieving high-speed data communication. A CPU connected to the portof such a device can transmit data to be processed by a logic circuit tothe device via the port at high speed. If an FPGA including a pluralityof such high-speed ports is shared by a plurality of CPUs, each port canbe connected with different CPUs. The CPUs can transmit data to thecorresponding ports without the intervention of the other CPUs (i.e.,independently) and process the data by using logic circuits.

Recent programmable logic devices are capable of performing deviceconfiguration from a CPU that transmits circuit information to thedevices via the high-speed ports.

Some programmable logic devices may have a port that can receive circuitinformation from a CPU but does not support configuration using thecircuit information. In such a case, a configuration mechanism is neededfor a CPU to which no configuration-capable high-speed port is assigned.

In addition, even if a device can be configured from any of a pluralityof high-speed ports to which different CPUs are connected, each CPUneeds to perform control to avoid conflict with the configurationperformed by other CPUs. For example, each CPU needs to perform controlto prohibit all the other CPUs from performing configuration.

SUMMARY OF THE INVENTION

One disclosed aspect of the embodiments is directed to solving at leastany one of the foregoing problems.

According to an aspect of the embodiments, an information processingsystem includes a device including a circuit for configuring a logiccircuit according to circuit information, a first control unitconfigured to process a first job by using a first logic circuitconfigured in the circuit according to first circuit information, thefirst control unit being connected to the device, and a second controlunit configured to process a second job by using a second logic circuitconfigured in the circuit according to second circuit information, thesecond control unit being connected to the device, wherein the devicecan configure a logic circuit in the circuit according to circuitinformation transmitted from the first control unit, and wherein thefirst control unit transmits the first circuit information to the deviceto configure the first logic circuit in the circuit, and transmits thesecond circuit information to the device to configure the second logiccircuit in the circuit.

Further features of the disclosure will become apparent from thefollowing description of exemplary embodiments with reference to theattached drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an overall block diagram of an information processing system.

FIGS. 2A, 2B and 2C illustrate an example of job data and an example ofa job request function correspondence table.

FIGS. 3A and 3B illustrate configuration examples of configurationinformation about a programmable processing unit.

FIG. 4 illustrates an example of an internal block diagram of theprogrammable processing unit.

FIG. 5 is a flowchart of configuration request processing by a secondprocessing unit.

FIG. 6 is a flowchart of configuration processing by a first processingunit.

FIG. 7 illustrates an example of a state transition table.

FIG. 8 is a flowchart of configuration processing by the firstprocessing unit including advance configuration processing.

FIG. 9 is a flowchart of the advance configuration processing.

DESCRIPTION OF THE EMBODIMENTS

Exemplary embodiments of the disclosure will be described below withreference to the drawings.

According to a first exemplary embodiment, there are two control unitsreferred to as first and second control units. The second control unittransmits a configuration request to a first control unit whenoccurrence of a job is detected. Based on the received configurationrequest, the first control unit transmits circuit information about alogic circuit that the second control unit uses to process the job to anFPGA device via a PCIe bus. The FPGA device then configures the logiccircuit according to the transmitted circuit information. The secondcontrol unit processes the job by using the configured logic circuit.

In other words, the first control unit transmits the circuit informationabout the logic circuit needed to process the job to the FPGA devicebased on the detection of the occurrence of the job to be processed bythe second control unit.

From another point of view, the first control unit transmits the circuitinformation about the logic to the FPGA device via the PCIe bus even ifthe first control unit does not use the logic circuit to process thejob.

In the following description of all the exemplary embodiments, “processa job” refers to processing of data to be processed by the job. “Controlunit processes a job by using a logic circuit” means that the controlunit transmits data to be processed by the job to the FPGA device, thelogic circuit on the FPGA device processes the data, and the controlunit receives the processing result.

<Overall Configuration of System>

FIG. 1 is an overall block diagram of an image processing system 100which is an example of an information processing system according to thepresent exemplary embodiment. The image processing system 100 accordingto the present exemplary embodiment includes at least two or moreprocessing units (control units) for processing a job.

A first processing unit 110 performs an operation control of the imageprocessing system 100 and basic image processing such as color spaceconversion and halftoning. The first processing unit 110 is typicallyreferred to as a main controller or a motherboard. Internal blocks ofthe first processing unit 110 are described below.

A control unit 111 is a CPU for controlling the first processing unit110. The control unit 111 includes at least one port connected to a PCIebus. The PCIe port is electrically connected to a PCIe IP 403 (firstport to be described below) of a programmable processing unit 400described below via the PCIe bus. The control unit 111 transmits data tobe processed by a job and circuit information described below from thePCIe port to the programmable processing unit 400 (first port to bedescribed below) via the PCIe bus. For example, the control unit 111transmits first circuit information to the programmable processing unit400 (first port described below) via the PCIe bus, so that a first logiccircuit is configured in the programmable processing unit 400 accordingto the first circuit information. The control unit 111 transmits data tobe processed by a first job to the programmable processing unit 400(first port to be described below) via the PCIe bus. The control unit111 then receives data (processing result) processed by the first logiccircuit from the programmable processing unit 400 (first port describedbelow). Through such a procedure, the control unit 111 processes thedata (i.e., first job) by using the first logic circuit.

A main storage unit 112 is a storage device capable of high-speedaccess, including a synchronous dynamic random access memory (SDRAM).The main storage unit 112 stores image data and print data for thecontrol unit 111 to process, as well as software programs for thecontrol unit 111 to execute. The main storage unit 112 also storescircuit information to be written to the programmable processing unit400 described below. In other words, the main storage unit 112 stores atleast circuit information about a logic circuit used for job processingby the first processing unit 110 (control unit 111) and circuitinformation about a logic circuit used for job processing by a secondprocessing unit 120 (control unit 121). The main storage unit 112including an SDRAM is a volatile memory. Therefore, data stored in themain storage unit 112 is read from a following auxiliary storage unit113 and temporarily stored therein.

The auxiliary storage unit 113 is a nonvolatile storage device such as ahard disk and a flash memory. The auxiliary storage unit 113 storesimage data, print data, software programs, and circuit information to beread into the main storage unit 112.

An external interface (IF) unit 114 is an interface corresponding toEthernet (registered trademark) and Universal Serial Bus (USB). In FIG.1, the first processing unit 110 is connected to the second processingunit 120 via the external IF unit 114. However, the first processingunit 110 may be connected to an external information terminal such as anetwork server and a client personal computer (PC).

An operation display unit 115 is a touch screen or other device that hasboth a display function and an operation function. The operation displayunit 115 functions as a user interface unit of the first processing unit110. A liquid crystal display and hardware keys may be combined toconstitute the operation display unit 115.

The foregoing units are electrically connected to each other via asystem bus 116.

The second processing unit 120 is configured to perform processing ofdifferent types from those of the first processing unit 110, and/orperform processing of the same types as those of the first processingunit 110 at higher speed. The second processing unit 120 is typicallyreferred to as add-on hardware or an accelerator. Internal blocks of thesecond processing unit 120 are described below.

The control unit 121 is a CPU for controlling the second processing unit120. The control unit 121 includes at least one port for connecting to aPCIe bus. This PCIe port is electrically connected to a PCIe IP 403(second port described below) of the programmable processing unit 400 tobe described below via the PCIe bus. The control unit 121 transmits datato be processed by a job from the PCIe port to the programmableprocessing unit 400 via the PCIe bus. For example, the control unit 121transmits data to be processed by a second job to the programmableprocessing unit 400 (second port to be described below) via the PCIebus, so that the data (i.e., second job) is processed by using a secondlogic circuit configured in the programmable processing unit 400. Aswill be described below, the second logic circuit is configured in theprogrammable processing unit 400 according to second circuit informationthat the control unit 111 transmits to the programmable processing unit400 (second port described below) via the PCIe bus.

The control unit 121 according to the present exemplary embodiment isdirectly connected to the control unit 111 via an inter-control unitcommunication interface (I/F) 132. However, the control unit 121 onlyneeds to be electrically connected to the control unit 111 so that thecontrol unit 121 can notify the control unit 111 of a signal.

A main storage unit 122 is a storage device including an SDRAM which canbe accessed at a high speed. Data which the control unit 121 processesand software which the control unit 121 executes are loaded into themain storage unit 122.

An auxiliary storage unit 123 is a nonvolatile storage device such as aflash memory. The auxiliary storage unit 123 stores image data andsoftware.

An external IF unit 124 is an interface corresponding to Ethernet(registered trademark) and USB. In FIG. 1, the second processing unit120 is connected to only the first processing unit 110 via the externalIF unit 124. However, the second processing unit 120 may be connected toan external information terminal such as a network server and a clientPC.

A device input-output (IO) unit 125 is a data input-output unitcompliant with communication bus standards such as USB and Thunderbolt(registered trademark). For example, a temperature sensor for monitoringambient temperature and an image sensor for obtaining a surroundingcondition as image data can be connected to the device IO unit 125.

The foregoing units are electrically connected to each other via asystem bus 127.

The programmable processing unit 400 is connected to the control unit111 via an interface 130, and connected to the control unit 121 via aninterface 131. The interfaces 130 and 131 are a PCIe bus and an FPGAcontrol bus, respectively. Details of the programmable processing unit400 will be described below with reference to FIG. 4.

A working memory unit 126 is a storage device including an SDRAM whichcan be accessed at a high speed. The working memory unit 126 isconnected to the programmable processing unit 400 and functions as awork memory device.

The inter-control unit communication I/F 132 is a data communication bussuch as USB and Thunderbolt. The inter-control unit communication I/F132 is used for job control between the control units 111 and 121 andfor control information about configuration. As a modified example ofthe image processing system 100, a plurality of control units mayperform data communication with each other via the external IF units 114and 124 without the inter-control unit communication I/F 132.

The overall block diagram of the image processing system 100 accordingto the present exemplary embodiment has been described above.

<Configuration of Programmable Processing Unit 400>

The programmable processing unit 400 is a programmable logic device ofwhich an internal logic circuit configuration is programmable. In thepresent exemplary embodiment, the programmable processing unit 400 isdescribed by using an FPGA as an example. However, the programmableprocessing unit 400 may be a CPLD or other programmable logic device ofwhich a logic circuit configuration is programmable.

The programmable processing unit 400 according to the present exemplaryembodiment includes a not-illustrated configuration memory and a fabric402. The fabric 402 includes a plurality of logic blocks and a wiringarea. A logic block includes a lookup table for determining an outputwith respect to an input, and a register for holding the output. Thewiring area connects the logic blocks with each other, or connects thelogic blocks with an interface to an external device (such as a PCIe IPcore). If circuit information is written to the programmable processingunit 400, the lookup tables included in the logic blocks and theconnection state of the wiring area are changed to constitute a logiccircuit. The fabric 402 is sectioned into a plurality of regions. Eachregion can be dynamically reconfigured without affecting the contents oflogic circuits configured in the other regions. The regions are uniquelyidentified by information for uniquely identifying the respectiveregions (such as identifiers PR1 and PR2).

FIG. 4 is an internal block diagram of the programmable processing unit400 (FPGA) according to the present exemplary embodiment. Theprogrammable processing unit 400 includes a configuration controller401, the fabric 402, the PCIe IP 403, and a memory controller IP 404.

The configuration controller 401 writes circuit information receivedfrom the control unit 111 to the programmable processing unit 400(performs configuration). If the configuration controller 401 detectscompletion of the configuration of the fabric 402, the configurationcontroller 401 outputs an InitDone signal to the control unit 111. TheInitDone signal is a signal indicating the completion of configuration.

Logic circuits according to circuit information are configured in thefabric 402. In the present exemplary embodiment, a plurality of regions(such as PR1 and PR2) is prepared in the fabric 402 in advance, andlogic circuits can be reconfigured in each region. The fabric 402includes ProcDone_Register0 and ProcDone_Register1 which are registersfor holding information indicating an execution end status of processingperformed by the configured logic circuits. A ProcDone_0 signal fromProcDone_Register0 is output to the control unit 111. A ProcDone_1signal from ProcDone_Register1 is output to the control unit 121.

The PCIe IP 403 is a protocol stack including the PCIe Physical Layer(PHY). The PCIe IP 403 includes at least two or more PCIe IP cores. EachIP core implements a corresponding PCIe connection. The PCIe IP 403according to the present exemplary embodiment includes two PCIe IP cores(first port and second port) connected to the fabric 402. The first portimplements a PCIe connection between the control unit 111 and the fabric402. The second port implements a PCIe connection between the controlunit 121 and the fabric 402.

In FIG. 4, a PCIe_0 signal and a PCIe_1 signal represent datatransmission/reception signals and clock signals via the PCIe busesconnected to the respective ports. The PCIe IP 403 transmits andreceives the PCIe_0 signal to/from the control unit 111, and transmitsand receives the PCIe_1 signal to/from the control unit 121. Suchsignals are used to communicate data between the control unit 111 or 121and the programmable processing unit 400. The PCIe_0 signal inparticular is also used when receiving circuit information transmittedfrom the control unit 111 for the purpose of configuration. That is, thecontrol unit 111 can transmit circuit information and a configurationinstruction according to the circuit information to the programmableprocessing unit 400 via the PCIe bus. Specifically, the control 111inquires the programmable processing unit 400 whether configuration canbe performed. If the control unit 111 in response receives informationindicating that configuration can be performed from the programmableprocessing unit 400 via the PCIe bus, the control unit 111 transmitscircuit information. In such a manner, the control unit 111 instructsthe programmable processing unit 400 to perform configuration.

On the other hand, the PCIe_1 signal cannot be used to receive circuitinformation from the control unit 121 for the purpose of configuration.That is, the control unit 121 is configured to not (not able to)transmit a configuration instruction to the programmable processing unit400 via the PCIe bus.

In other words, the programmable processing unit 400 is set to configurelogic circuits in the fabric 402 according to circuit informationtransmitted from the control unit 111, but not to configure logiccircuits in the fabric 402 according to circuit information transmittedfrom the control unit 121. Therefore, the control unit 111 transmitscircuit information about a logic circuit to be used in the processingof a job by the processing unit 111 to the programmable processing unit400 via the PCIe bus (interface 130). The control unit 111 alsotransmits circuit information about a logic circuit to be used in theprocessing of a job by the control unit 121 to the programmableprocessing unit 400 via the PCIe bus (interface 130).

The memory controller IP 404 is a memory interface including PHY and acontroller conforming to a double data rate (DDR) specification. In FIG.4, a DRAM signal represents a data signal, an address signal, and aclock signal. The DRAM signal is output to the working memory unit 126.

<Job Data Configuration>

FIG. 2A illustrates a data configuration example of job data. Job datarefers to data generated for each job to be performed in the firstprocessing unit 110 or the second processing unit 120. The job dataincludes information such as a job identifier (ID), a job requestfunction, and job setting parameters.

The job ID is information unique to each job. The job data can beuniquely identified by referring to the job ID.

The job request function is information indicating a function needed toperform the job. Details will be described below.

The job setting parameters include image processing unit setting dataand an image source. The image processing unit setting data includesvalues that are set when another piece of job data is generatedtriggered by the operation display unit 111, an external informationterminal, or an already-running job. The image processing unit settingdata includes an adjustment parameter selected or arbitrarily input bythe user, and/or a value of an image processing parameter recorded inadvance. For example, it is a density value or information about whetherto select monochrome or full color. The image source indicates alocation where image data to be processed in the job is stored, and aformat of the image data. For example, the image source indicates imagedata stored in the main storage unit 112 or a stream of image data inputfrom an external device. The format of the image data may be raw data,or an image data format such as Joint Photographic Experts Group (JPEG),Joint Bi-level Image Experts Group (JBIG), and Tagged Image File Format(TIFF). Any data format may be used.

FIG. 2B illustrates an example of a job request function correspondencetable in which job request functions of jobs occurring on the side ofthe first processing unit 110 are associated with information related tothe job request functions. This job request function correspondencetable is stored in the auxiliary storage unit 113. The control unit 111reads and stores the job request function correspondence table from theauxiliary storage unit 113 into the main storage unit 112 when the firstprocessing unit 110 is activated.

A job request function column lists functions processable by the imageprocessing system 100. A support device column lists devices that canperform the corresponding job request functions. A use of programmableprocessing unit column lists whether the programmable processing unit400 needs to be used when performing the corresponding job requestfunctions. A circuit information column lists information that canuniquely identify circuit information needed when performing thecorresponding job request functions. Based on the information about thejob request function in the job data and the job request functioncorrespondence table of FIG. 2B, the control unit 111 can determine thedevice and circuit information for implementing the job requestfunction.

FIG. 2C illustrates an example of a job request function correspondencetable in which job request functions of jobs to be performed on the sideof the second processing unit 120 are associated with informationrelated to the job request functions. This job request functioncorrespondence table is stored in the auxiliary storage unit 123. Thecontrol unit 121 reads and stores the job request functioncorrespondence table from the auxiliary storage unit 123 into the mainstorage unit 122 when the second processing unit 120 is activated. Thejobs to be performed on the side of the second processing unit 120include jobs occurring in the second processing unit 120, as well asprocessing assigned from the first processing unit 110 to the secondprocessing unit 120.

A job request function column lists functions processable by the imageprocessing system 100. A use of programmable processing unit columnlists whether the programmable processing unit 400 needs to be used whenperforming the corresponding job request functions. A circuitinformation column lists information that can uniquely identify circuitinformation needed when performing the corresponding job requestfunctions. Based on the information about the job request function inthe job data and the job request function corresponding table of FIG.2C, the control unit 121 can determine the device and circuitinformation for implementing the job request function. The informationabout the jobs occurring in the second processing unit 120 managed bythe job request function correspondence table, may include the same dataas that of the job request function correspondence table of the firstprocessing unit 110.

<Configuration Information of Programmable Processing Unit 400>

FIGS. 3A and 3B illustrate examples of configuration informationindicating logic circuits configured in the programmable processing unit400. The configuration information is stored in the main storage unit112 by the control unit 111. The control unit 121 also storesconfiguration information in the main storage unit 122. The controlunits 111 and 121 can thus independently identify the functions of thelogic circuits configured in the programmable processing unit 400 atthat point in time without inquiring of the other control units. Morespecifically, when the first processing unit 110 (control unit 111)configures the programmable processing unit 400, the control unit 111can refer to the configuration information and determine a region on thefabric 402 where a logic circuit is configured by writing circuitinformation. For example, the control unit 111 can identify a region onthe fabric 402 which configures a logic circuit but is not used by anydevice, and write the circuit information to form another logic circuitin the identified region. In a similar fashion, the second processingunit 120 (control unit 121) is operated. That is, when the control unit121 uses the programmable processing unit 400 to perform a job occurringin the second processing unit 120, the control unit 121 can refer to theconfiguration information and determine whether the programmableprocessing unit 400 needs to be configured. If it is determined that theprogrammable processing unit 400 needs to be configured, the controlunit 121 may instruct the control unit 111 via the inter-control unitcommunication I/F 132 to write circuit information to configure acertain logic circuit in a certain region. Each configurationinformation stored in the main storage units 112 and 122 is updated eachtime the logic circuits configured in the programmable processing unit400 change.

FIG. 3A will initially be described. FIG. 3B will be described below.

The configuration information illustrated in FIG. 3A includes threepieces of information (1), (2), and (3) in a record.

Information (1): Information in a partial region (PR) position column(left column in FIG. 3A) is intended to identify the position of eachregion (PR) on the fabric 402 of the programmable processing unit 400. Alogic circuit can be configured in each region. Any information may beused as long as each region on the fabric 402 can be identified. Forexample, the regions (such as region names) and address data thatenables access to the logic circuits may be used.

Information (2): Information in a support device column (center columnin FIG. 3) is intended to identify the devices using the logic circuitsconfigured in the regions on the fabric 402. In the present exemplaryembodiment, the information is set to one of the “first processingunit,” the “second processing unit,” and “not applicable” (denoted by“-” in FIG. 3A).

Information (3): Information in a circuit information column (rightcolumn in FIG. 3A) is intended to identify the circuit information aboutthe logic circuits configured in the corresponding regions on the fabric402. For example, it is an identifier of the circuit information (suchas data file names) or a location where the data is stored.

In the present exemplary embodiment, the configuration information isprovided in both the first processing unit 110 and the second processingunit 120. However, an embodiment is not limited to such a layout. Forexample, the configuration information may be stored in either one ofthe main storage unit of the first processing unit 110 and the secondprocessing unit 120, and the other processing unit may be configured torefer to the configuration information via the external IF units 114 and124.

<About Control of First Exemplary Embodiment>

Control of the first exemplary embodiment will be described in thefollowing manner.

A control flow of the control unit 121 will be described with referenceto FIG. 5.

A control flow of the control unit 111 will be described with referenceto FIG. 6.

A processing flow of cooperative operation of the control units 111 and121 and the programmable processing unit 400 will be described withreference to FIG. 7.

<Control Flow of Control Unit 121>

FIG. 5 is a flowchart illustrating the control flow of the control unit121. This control flow is performed by using the control unit 121according to a program loaded into the main storage unit 122.

In step S500, the control unit 121 detects the occurrence of a job, andobtains a job request function from the job data illustrated in FIG. 2A.

A job occurs when job data is generated by an application executed bythe control unit 121. Alternatively, a job occurs when the control unit121 receives job data generated by another control unit (for example,the control unit 111). For example, if a new camera device is connectedto the device IO unit 125 and processing of image data transmitted fromthe camera device is newly required, a new job is generated as a jobrequest function for the image processing in the camera device. Then,required processing such as configuration for enabling camera imageprocessing, is started. The connected device is not limited to a camera.Further, the event that triggers the generation of a job is not limitedto the connection of a device to the device IO unit 125.

In step S501, the control unit 121 determines whether to use theprogrammable processing unit 400, based on the job request functionobtained in step S500 and the job request function correspondence tableillustrated in FIG. 2C. Specifically, the control unit 121 identifies arecord of FIG. 2C that includes the job request function obtained instep S500, and refers to the use of programmable processing unit columnof the identified record. If the use of programmable processing unitcolumn is “yes,” the control unit 121 determines to use the programmableprocessing unit 400 (YES in step S501), and the processing proceeds tostep S502. On the other hand, if the use of programmable processing unitcolumn is “no,” the control unit 121 determines not to use theprogrammable processing unit 400 (NO in step S501), and the processingends.

In step S502, the control unit 121 checks the configuration information(FIG. 3A) stored in the main storage unit 122. Specifically, the controlunit 121 searches for the record of FIG. 2C that includes the jobrequest function obtained in step S500. If there is no applicablerecord, the control unit 121 obtains “not applicable” as informationabout the support device. If there is an applicable record, the controlunit 121 refers to the circuit information column of the record of FIG.2C, and obtains the information for identifying the circuit information.Next, the control unit 121 identifies a record or records of theconfiguration information of FIG. 3A that include(s) the obtainedinformation, and obtains the information in the support device column ofthe identified record(s). For example, if the job request function is“sensor processing 2,” the circuit information column of the record ofFIG. 2C includes three pieces of information “ADV_Sencing.config,”“ADV_Img_Process01.config,” and “ADV_Img_Process02.config.” Of these,“ADV_Sencing.config” has no applicable record in the configurationinformation of FIG. 3A, and information “not applicable” is obtained.

In step S503, if the information obtained in step S502 is the “firstprocessing unit” or “not applicable,” the control unit 121 determinesthat configuration is needed (YES in step S503), and the processingproceeds to step S504. On the other hand, if the support device referredto in step S502 is the second processing unit, the control unit 121determines that configuration is not needed (NO in step S503), and theprocessing proceeds to step S508.

In step S504, the control unit 121 makes a configuration request to thecontrol unit 111 via the inter-control unit communication I/F 132. Theconfiguration request includes the information in the circuitinformation column (information for identifying needed circuitinformation) of the record of FIG. 2C that includes the job requestfunction obtained in step S500. For example, if the job request functionis the “sensor processing 2,” the configuration request includes threepieces of information “ADV_Sencing.config,” “ADV_Img_Process01.config,”and “ADV_Img_Process02.config.” Then, the processing proceeds to stepS506.

In step S506, the control unit 121 determines whether a configurationcompletion notification is received from the control unit 111 via theinter-control unit communication I/F 132. If the configurationcompletion notification is received (YES in step S506), the processingproceeds to step S507. If the configuration completion notification isnot received (NO in step S506), the processing loops to step S506. Thatis, the processing waits until the configuration completion notificationis received. The configuration completion notification includesinformation to be used to update the configuration information stored inthe control unit 121 (information indicating that a logic circuitaccording to certain circuit information being used by a certain device,is configured in a certain PR position).

In step S507, the control unit 121 updates the configuration information(FIG. 3A) stored in the main storage unit 122 in response to theconfiguration completion notification. For example, suppose that theconfiguration completion notification includes information indicatingthat “a logic circuit corresponding to “ADV_Sencing.config” isconfigured in a region PR6 and is used by the second processing unit120.” In such a case, the control unit 121 updates the configurationinformation of the main storage unit 122 from FIG. 3A to FIG. 3B. Thatis, the record of the region PR6 in the configuration information of themain storage unit 122 is updated. Then, the processing proceeds to stepS508.

In step S508, the control unit 121 processes the job occurring in stepS500 by using the desired logic circuit(s) configured in the fabric 402of the programmable processing unit 400. In other words, the controlunit 121 processes the job by using the logic circuit(s) of theprogrammable processing unit 400 (performs coordination processing). Thelogic circuit configured in the fabric 402 which is to be used isdetermined based on the information included in the configurationcompletion notification that indicates a PR position where the logiccircuit is configured. In the coordination processing, the control unit121 transmits data to be processed by the job to the programmableprocessing unit 400 (second port) via the PCIe bus. The programmableprocessing unit 400 (second port) then transmits processing result datato the control unit 121, and ends the execution of the job. If theexecution of the job is ended, ProcDone_Register1 of the programmableprocessing unit 400 transmits the ProcDone_1 signal to the control unit121.

In step S509, the control unit 121 determines whether the coordinationprocessing is completed. Specifically, the control unit 121 determineswhether the ProcDone_1 signal has been received. If the ProcDone_1signal has been received (YES in step S509), the present flow ends. Ifnot (NO in step S509), the processing loops to step S508. That is, theprocessing waits until the processing of the job by the coordinationprocessing ends.

The control flow of the control unit 121 has been described above.

<Control Flow of Control Unit 111>

FIG. 6 is a flowchart illustrating the control flow of the control unit111. This control flow is performed by the control unit 111 according toa program loaded into the main storage unit 112.

In step S600, the control unit 111 determines whether the configurationrequest of step S504 has been received from the control unit 121 via theinter-control unit communication I/F 132. If the configuration requesthas been received (YES in step S600), the processing proceeds to stepS602. If the configuration request has not been received (NO in stepS600), the processing loops to step S600. That is, the processing waitsuntil the configuration request is received.

In step S601, the control unit 111 determines whether all information(information for identifying circuit information) included in theconfiguration request received in step S600 has been checked. Forexample, if the configuration request includes three pieces ofinformation “ADV_Sencing.config,” “ADV_Img_Process01.config,” and“ADV_Img_Process02.config,” the control unit 111 determines whether eachof the pieces of information has been subjected to the subsequentprocessing of step S602 and subsequent steps. If all the information ischecked (YES in step S601), the processing proceeds to step S606. If not(NO in step S601), the control unit 111 identifies unchecked informationamong the pieces of information included in the configuration request,and performs the processing of step S602 and subsequent steps on theidentified information.

In step S602, the control unit 111 checks the configuration information(FIG. 3A) stored in the main storage unit 112. Specifically, the controlunit 111 searches the configuration information of FIG. 3A for a recordthat includes the information identified in step S601 (information foridentifying circuit information).

If there is no applicable record, the desired logic circuit is notconfigured. The control unit 111 thus determines that configurationaccording to the circuit information is needed.

If there is an applicable record, the control unit 111 refers to theinformation in the support device column of that record. The controlunit 111 determines whether the support device indicated in theinformation is either the “processing unit from which the configurationrequest has been transmitted (in the present exemplary embodiment, thesecond processing unit 120)” or “not applicable.”

If the support device is the “processing unit from which theconfiguration request has been transmitted” or “not applicable,” thedesired logic circuit has already been configured in a state immediatelyusable by the “processing unit from which the configuration request hasbeen transmitted.” The control unit 111 then determines that theconfiguration according to the circuit information is not needed.

On the other hand, if the support device is a “processing unit differentfrom the processing unit from which the configuration request has beentransmitted (in the present exemplary embodiment, the first processingunit 110),” the desired logic circuit has already been configured but isnot in the state immediately usable by the “processing unit from whichthe configuration request has been transmitted.” The control unit 111then determines that the configuration according to the circuitinformation is needed.

In step S603, the control unit 111 branches the processing based on thedetermination result in step S602. More specifically, if theconfiguration according to the circuit information is needed (YES instep S603), the processing proceeds to step S604. If not (NO in stepS603), the processing proceeds to step S601. The reason why theconfiguration needs to be determined again after the reception of theconfiguration request is that the state of configuration of theprogrammable processing unit 400 may have changed from the point in timeof step S503 where the necessity of the configuration has beendetermined. For example, even if at the point in time of step S503 theconfiguration has been determined as necessary because the control unit111 is using a logic circuit, the control unit 111 may have finishedusing the logic circuit at the point in time of step S603. In such acase, it is determined that the configuration is not needed.

In step S604, the control unit 111 instructs the programmable processingunit 400 to perform the configuration based on the informationidentified in step S601 (information for identifying circuitinformation). Specifically, the control unit 111 initially identifiesthe circuit information to be written (for example, ADV_Sencing.config)from the information identified in step S601. The control unit 111 thensearches the fabric 402 for a free region (for example, region PR6) inwhich to configure the logic circuit, and notifies the configurationcontroller 401 of the region. The control unit 111 then notifies theconfiguration controller 401 of transmission of the circuit informationabout the logic circuit to be configured in the region (for example,region PR6) of the fabric 402 via the first port of the PCIe IP 403 byusing the PCIe_0 signal. The control unit 111 then transmits the circuitinformation stored in the main storage unit 112 to the programmableprocessing unit 400 via the first port of the PCIe IP 403. Theconfiguration controller 401 writes the circuit information received viathe first port of the PCIe IP 403 into the programmable processing unit400. In such a procedure, the programmable processing unit 400 performsconfiguration. When the configuration is completed, the configurationcontroller 401 transmits the InitDone signal to the control unit 111.

In step S605, the control unit 111 determines whether the InitDonesignal has been received from the programmable processing unit 400. Ifthe InitDone signal has been received (YES in step S605), the processingproceeds to step S601. If not (NO in step S605), the processing loops tostep S605. That is, the processing waits unit the InitDone signal isreceived.

In step S606, the control unit 111 updates the configuration information(FIG. 3A) stored in the main storage unit 112 with the latestinformation with respect to all the information (information foridentifying circuit information) included in the configuration requestreceived in step S600. There are two cases where the update isperformed.

In a first case, the control unit 111, in step S604, instructs theprogrammable processing unit 400 to perform configuration with respectto the information identified in step S601.

In a second case, the control unit 111, in step S603, determines thatthe support device is the “processing unit from which the configurationrequest has been transmitted” or “not applicable” and configuration isnot needed.

In the first case, the control unit 111 updates the configurationinformation (FIG. 3A) with the information identified in step S601,thereby obtaining the configuration information on which theconfiguration of the configured programmable processing unit 400 isreflected (for example, FIG. 3B). For example, the control unit 111 addsinformation indicating that the circuit information identified byADV_Sencing.config is written to the region PR6 where the support deviceis the second processing unit.

In the second case, the control unit 111 updates only the support devicecolumn of the configuration information with the information identifiedin step S601. This is because the logic circuit needed by the controlunit 121 has already been configured in the fabric 402 and thus theconfiguration is not performed, but the information about the supportdevice needs to be updated.

In step S607, the control unit 111 transmits a configuration completionnotification to the control unit 121 via the inter-control unitcommunication I/F 132. Note that the information included in theconfiguration completion notification differs between the two casesdescribed in step S606.

In the foregoing first case, the control unit 111 includes informationabout the fabric 402 changed by the configuration in the configurationcompletion notification. More specifically, the configuration completionnotification includes information indicating that the logic circuitaccording to certain circuit information being used by a certain device,is configured in a certain PR position.

In the foregoing second case, the control unit 111 includes in theconfiguration completion notification the information about the recordin which the information in the support device column, with respect tothe configuration information stored in the main storage unit 112 hasbeen changed.

The control flow of the control unit 111 according to the presentexemplary embodiment has been described above.

According to the first exemplary embodiment, based on the detection ofthe occurrence of a job to be processed by the control unit 121, thecontrol unit 111 transmits circuit information about a logic circuitneeded for the processing of the job to the programmable processing unit400 so that the job is processed by the control unit 121. In otherwords, in the first exemplary embodiment, the configuration processingis started “after the occurrence of the job to be processed by thecontrol unit 121 is detected.”

In a second exemplary embodiment, configuration processing is started“before the occurrence of a job to be processed by the control unit 121is detected.”

Such an operation is achieved by performing processing of the flowchartof FIG. 8. The processing of the flowchart of FIG. 8 is performed by thecontrol unit 111 according to a program loaded into the main storageunit 112. In other words, the operation is achieved by the control unit111 performing advance configuration processing (step S800) whilewaiting for the processing of step S600 in the flowchart of FIG. 6.

The advance configuration processing refers to processing in which thecontrol unit 111 transmits circuit information about a logic circuitthat the control unit 121 uses to process a job, to the programmableprocessing unit 400 before the occurrence of the job to be processed bythe control unit 121 is detected. Details of the advance configurationprocessing (step S800) will be described with reference to the flowchartof FIG. 9.

By performing the advance configuration processing, in the presentexemplary embodiment, the control unit 111 can thus transmit the circuitinformation about the logic circuit that the control unit 121 uses toprocess the job, to the programmable processing unit 400 similar to thefirst exemplary embodiment. Moreover, in the present exemplaryembodiment, since the configuration processing is started before theoccurrence of the job to be processed by the control unit 121 isdetected, the configuration processing can be completed earlier than ina case where the configuration processing is started after theoccurrence of the job is detected. In other words, the processing of thejob by the control unit 121 using the logic circuit) can be startedearlier. Similarly, the processing of a job by the control unit 111using a logic circuits can also be started earlier.

<Advance Configuration Processing>

The advance configuration processing will be described with reference toFIGS. 7 and 9.

FIG. 7 illustrates an example of a state transition table which is usedto perform the advance configuration processing according to the presentexemplary embodiment. The state transition table is used to predict alogic circuit to be used in the next processing of a job to which thecurrent state of the image processing system 100 shifts (in particular,a logic circuit to be used in the processing of a job by the controlunit 121). The control unit 111 then transmits the circuit informationabout the logic circuit predicted to be used, to the programmableprocessing unit 400 before the occurrence of the job (in particular, thejob to be processed by the control unit 121) is detected. FIG. 9 is aflowchart illustrating specific processing of a serial flow.

[State Transition Table]

Details of the state transition table will be described with referenceto FIG. 7. In the present exemplary embodiment, state transition tablesare stored in the main storage unit 112. The control unit 111 obtains anappropriate state transition table 702 according to the current state(state table 701) of the image processing system 100. The statetransition table 702 is a table related to states to which the imageprocessing system 100 (in particular, the first processing unit 110) canshift from the current state.

The state table 701 is stored in the main storage unit 112 and managedby the control unit 111. More specifically, the control unit 111monitors the state of the image processing system 100 at predeterminedtiming, and updates the state table 701 with information about the stateof the image processing system 100. The state table 701 includes thecurrent state of the image processing system 100, time that has elapsedin the current state, and if the current state involves specificprocessing, the degree of progress of the processing. In the state table701 of FIG. 7, the current state of the image processing system 100 is“idle” which indicates that no specific processing is being performed.The time that has elapsed in the current state is “3 minutes (3 min).”The degree of progress of processing is empty since no specificprocessing is being performed in the current state.

The state transition table 702 includes shift destination candidate,circuit information, and support device columns. The shift destinationcandidate column lists candidates of a state to which the “currentstate” shown in the state table 701 can shift. In other words, statetransition tables 702 are stored in association with “current states” sothat an appropriate state transition table 702 can be identified fromthe “current state” of the state table 701. The contents of the shiftdestination candidates are therefore not fixed but vary depending on thecurrent state. For example, if the current state of the state table 701is “idle,” a state transition table 702 indicating “sleep,” “print,” and“scan” as the candidates of the destination state is identified.

Each shift destination candidate of the state transition table 702 isincluded in a different record. Each record includes the circuitinformation and support device columns in addition to the shiftdestination candidate column. The circuit information column included inthe record of a shift destination candidate includes information foridentifying circuit information about a logic circuit predicted to beused in that candidate state. The support device column includesinformation for identifying a device (such as the control unit 111(first processing unit 110) and the control unit 111 (second processingunit 120)) that uses the logic circuit predicted to be used in thecandidate state. For example, the circuit information column of therecord including the shift destination candidate “sleep” includesinformation (for example, identifier “ADV_Sencing.config”) foridentifying circuit information about a logic circuit predicted to beused by the support device when the image processing system 100 (firstprocessing unit 110) is in the state “sleep.” Similarly, identifiers“ADV_Img_Process01.config” and “ADV_Img_Process02.config” are alsoincluded in the circuit information column of the same record. Thesupport device column of the record includes information for identifyingthe “second processing unit (control unit 121)” which is predicted touse the logic circuits implemented by the circuit information identifiedby the foregoing three identifiers for job processing.

For example, the circuit information in the record where the shiftdestination candidate is “print” includes three identifiers. The logiccircuit corresponding to one of the three identifiers,“ADV_Sencing.config,” is predicted to be used by the “second processingunit.” The identification information about the circuit information,“ADV_Sencing.config,” is thus associated with the identificationinformation about the support device, “second processing unit,” in therecord. The logic circuits corresponding to the remaining twoidentifiers “ADV_Img_Process01.config” and “ADV_Img_Process02.config”are both predicted to be used not only by the “second processing unit”but by the “first processing unit (control unit 111)” as well. The twopieces of identification information about the circuit information,“ADV_Img_Process01.config” and “ADV_Img_Process02.config,” are thereforeassociated with the two pieces of identification information about thesupport devices, “second processing unit” and “first processing unit,”in the record.

That is, the state transition table 702 functions as informationindicating association between the state of the image processing system100 at that point in time and predetermined circuit informationcorresponding to the shift destination candidates.

[Flow of Advance Configuration Processing]

A flow of the advance configuration processing will be described withreference to FIG. 9.

In step S900, the control unit 111 obtains an appropriate statetransition table 702 according to the current state of the imageprocessing system 100, and obtains the information in the “circuitinformation” column of the obtained state transition table 702. In otherwords, this processing corresponds to processing for identifying atleast a piece of circuit information according to the current state ofthe image processing system 100 among a plurality of pieces of circuitinformation. The processing then proceeds to step S901.

Specifically, the control unit 111 refers to the “current state” columnof the state table 701 stored in the main storage unit 112, and obtainsthe state transition table 702 associated with the information in the“current state” column from the main storage unit 112. For example, ifthe information in the “current state” column is “idle,” the statetransition table 702 illustrated in FIG. 7 is obtained. The control unit111 then obtains the information in the “circuit information” column ofthe obtained state transition table 702.

For example, the control unit 111 may obtain all the information in the“circuit information” column of the state transition table 702.

Alternatively, the control unit 111 may refer to the information in the“elapsed time” column and/or the information in the “degree of progressof processing” column of the state transition table 702, and determinethe information to obtain based on the referred information. Forexample, suppose that the current state is “idle” and the “elapsed time”has exceeded a predetermined threshold. In such a case, the control unit111 obtains the information in the “circuit information” column of therecord where the “shift destination candidate” column is “sleep” in thestate transition table 702, but not the information in the “circuitinformation” column of the records of “print” and “scan.” The reason isthat if the system state “idle” lasts long, the possibility that thesystem state shifts to “sleep” can be predicted to be higher than thepossibilities of shifting to the other states. Now, suppose, forexample, that the current state is “scan” and the “degree of progress ofprocessing” has exceeded a predetermined threshold. In such a case, thecontrol unit 111 obtains the information in the “circuit information”column of the record where the “shift destination candidate” column is“print” in the state transition table 702, but does not obtain theinformation in the “circuit information” column of the record of“sleep.” The reason is that the possibility of shifting to “print” canbe predicted to be higher than the possibility that the system stateshifts to “sleep” immediately after exiting the state of “scan”. In sucha manner, the information to be obtained is determined based on theinformation in the “elapsed time” column and/or the information in the“degree of progress of processing” column of the state table 701. Thiscan suppress writing of needless circuit information to the programmableprocessing unit 400 in configuration processing in a subsequent stage.

In step S901, the control unit 111 determines whether all informationobtained in step S900 (information for identifying circuit information)is checked. For example, if the information obtained in step S900includes two pieces of information, the control unit 111 determineswhether each of the information has been subjected to the subsequentprocessing of step S902 and subsequent steps. If all the information ischecked (YES in step S901), the processing proceeds to step S906. If not(NO in step S901), the control unit 111 identifies an unchecked piece ofinformation among the pieces of information included in the informationobtained in step S900, and performs the processing of step S902 andsubsequent steps on the identified piece of information.

The processing of steps S902 to S907 corresponds to and is substantiallyequivalent to the processing of the foregoing steps S602 to S607,respectively. A difference lies in the following point. The processingof each of steps S602 to S607 deals with the information identified instep S601 (information for identifying circuit information). Theprocessing of each of steps S902 to S907 deals with the informationidentified in step S901 (information for identifying circuitinformation).

The control flow of the control unit 111 according to the presentexemplary embodiment has been described above.

<Modification of Second Exemplary Embodiment>

In the foregoing second exemplary embodiment, the control unit 111performs the advance configuration processing (the processing of theflowchart of FIG. 9) while waiting for the reception of a configurationrequest (during the processing wait in step S600).

In the present modification, the control unit 111 performs the advanceconfiguration processing at timing when the state of the imageprocessing system 100 shifts to another state. More specifically, thecontrol unit 111 detects that the state of the image processing system100 shifts to another predetermined state. The control unit 111 thenperforms the advance configuration processing according to thedetection.

Here, for example, the control unit 111 determines the information to beobtained in step S902 as the information in the “circuit information”column of the record corresponding to the predetermined state. Forexample, suppose that the control unit 111 performs the advanceconfiguration processing at timing when the system state shifts from“idle” to “sleep.” In such a case, the control unit 111 obtains, in stepS902, only the information in the “circuit information” column of therecord where the “shift destination candidate” is “sleep” in the statetransition table 702. This can suppress writing of needless circuitinformation to the programmable processing unit 400 in the configurationprocessing of step S904.

The modification described here, or more specifically, the writing ofthe circuit information identified by the information in the “circuitinformation” column of the record of “sleep” into the programmableprocessing unit 400 in advance at the timing when the system stateshifts to “sleep”, achieves a special effect. For example, if theoperation state of the image processing system 100 (first processingunit 110) shifts to “sleep,” the image processing system 100 typicallyoperates in a low power consumption state. In other words, the powerconsumption in the state “sleep” is lower than in the state “idle.” Insuch a situation, a job occurring in the second processing unit 120(control unit 121) may sometimes be processed desirably with theoperation state of the first processing unit 110 (control unit 111)maintained in the low power consumption state.

For example, a camera device is connected to the device IO unit 125 anda job of image processing of image data transmitted from the cameradevice may occur in the second processing unit 120 (control unit 121).In such a case, if the logic circuit for the image processing isconfigured on the fabric 402 in advance, the second processing unit 120(control unit 121) can start to process the job without transmitting aconfiguration request to the first processing unit 110 (control unit111). As a result, the first processing unit 110 (control unit 111) doesnot receive a configuration request and therefore will not change theoperation state of the image processing system 100 from “sleep” toperform configuration processing. In other words, the state “sleep”which is the low power consumption state can be maintained to reduce thepower consumption of the entire image processing system 100.

In the foregoing modification, the timing when the system state shiftsfrom “idle” to “sleep” is described as an example of the timing toperform the advance configuration processing. However, the timing is notlimited thereto.

For example, the first processing unit 110 (control unit 111) transmitscircuit information (first circuit information) to the programmableprocessing unit 400 (first port) via the PCIe bus, whereby a logiccircuit corresponding to the circuit information is configured in thefabric 402. The first processing unit 110 (control unit 111) thenperforms a first job by using the configured logic circuit. Here, thestate of the image processing system 100 shifts to a state indicatingthat the processing of the first job is in process. If the firstprocessing unit 110 (control unit 111) completes the first job by usingthe logic circuit, the state of the image processing system 100 shiftsto a state indicating that the processing of the first job is completed.In other words, the state of the image processing system 100 shifts fromthe in-process state of the first job to the completed state of thefirst job. As the state shifts, the control unit 111 transmits circuitinformation about a specific logic circuit predicted to be used toprocess a second job by the second processing unit 120 (control unit121) to the programmable processing unit 400 (first port) via the PCIebus. The programmable processing unit 400 then configures thepredetermined logic circuit before the occurrence of the second job. Thespecific logic circuit may be any logic circuit. For example, thespecific logic circuit may be the most frequently used one by the secondprocessing unit 120 (control unit 121) in the past among a plurality oflogic circuits. The specific logic circuit may also be the one specifiedby the user in advance. The specific logic circuit is configured in afree region of the fabric 402 if any. If there is no free region, thespecific logic circuit may be configured in a region where the oldestlogic circuit used by the control unit 111 is configured, or in a regionwhere a logic circuit which is the least frequently used by the controlunit 111 is configured. Even with such a configuration, the jobprocessing performed by the second processing unit 120 (control unit121) can quickly use the desired logic circuit. As a result, the jobprocessing can be completed earlier.

The advance configuration processing according to the second exemplaryembodiment is performed triggered by the first processing unit 110(control unit 111). More specifically, during the processing wait ofstep S600, the control unit 111 predicts a transition of the operationstate of the image processing system 100, and transmits the circuitinformation about the logic circuit predicted to be used by the jobprocessing in the predicted transitioned state of the image processingsystem 100, to the programmable processing unit 400.

An image processing system according to a third exemplary embodimentperforms advance configuration processing triggered by the secondprocessing unit 120 (control unit 121). This advance configurationprocessing is performed before the detection of a job in step S500. Theadvance configuration processing by the control unit 121 includessubstantially similar processing to steps S900 to S903. Morespecifically, through the processing of step S900, the control unit 121obtains information for identifying circuit information about apredicted logic circuit. In steps S901 and S902, the control unit 121checks the state of configuration of the fabric 402 with respect to eachinformation obtained. In step S903, the control unit 121 checks whetherthe configuration processing of the circuit information is needed. Ifnone of the information obtained needs to be configured, the processingends. If any of the circuit information needs to be configured, thecontrol unit 121 then performs the processing in steps S504 to S507 onthe circuit information, and the processing ends.

Through such advance configuration processing, the second processingunit 120 (control unit 121) can transmit in advance the configurationrequest to the control unit 111 via the inter-control unit communicationI/F 132.

Since the configuration request is thus made before the occurrence of ajob, the configuration can be completed earlier and the job can bequickly processed by using the logic circuit of the programmableprocessing unit 400. Such an effect can be obtained regardless of thecontrol unit 111 or the control unit 121 which processes the job.

(Other Exemplary Embodiments)

In the foregoing exemplary embodiments, the control unit 111 directlytransmits the circuit information and the data to the programmableprocessing unit 400 (first port) via the PCIe bus. However, this is notrestrictive. The control unit 111 may control a direct memory access(DMA) controller and transmit the circuit information and the data tothe programmable processing unit 400 (first port) via the PCIe bus byusing the DMA controller.

In the foregoing exemplary embodiments, the programmable processing unit400 is not capable of performing configuration from the control unit 121via the PCIe bus. However, an exemplary embodiment of the disclosure maybe applied to a programmable processing unit 400 that can be configuredby the control units 111 and 121 via respective corresponding PCIebuses. This can avoid the complexity of performing an arbitrationcontrol to permit or prohibit configuration between the control units111 and 121.

According to the foregoing exemplary embodiments, in a system where aplurality of control units shares a programmable logic device forconfiguring the logic circuits according to circuit information, theprogrammable logic device can be configured without complicating thesystem.

Other Embodiments

Embodiment(s) of the disclosure can also be realized by a computer of asystem or apparatus that reads out and executes computer executableinstructions (e.g., one or more programs) recorded on a storage medium(which may also be referred to more fully as a ‘non-transitorycomputer-readable storage medium’) to perform the functions of one ormore of the above-described embodiment(s) and/or that includes one ormore circuits (e.g., application specific integrated circuit (ASIC)) forperforming the functions of one or more of the above-describedembodiment(s), and by a method performed by the computer of the systemor apparatus by, for example, reading out and executing the computerexecutable instructions from the storage medium to perform the functionsof one or more of the above-described embodiment(s) and/or controllingthe one or more circuits to perform the functions of one or more of theabove-described embodiment(s). The computer may comprise one or moreprocessors (e.g., central processing unit (CPU), micro processing unit(MPU)) and may include a network of separate computers or separateprocessors to read out and execute the computer executable instructions.The computer executable instructions may be provided to the computer,for example, from a network or the storage medium. The storage mediummay include, for example, one or more of a hard disk, a random-accessmemory (RAM), a read only memory (ROM), a storage of distributedcomputing systems, an optical disk (such as a compact disc (CD), digitalversatile disc (DVD), or Blu-ray Disc (BD)™), a flash memory device, amemory card, and the like.

While the disclosure has been described with reference to exemplaryembodiments, it is to be understood that the disclosure is not limitedto the disclosed exemplary embodiments. The scope of the followingclaims is to be accorded the broadest interpretation so as to encompassall such modifications and equivalent structures and functions.

This application claims the benefit of Japanese Patent Application No.2014-249432, filed Dec. 9, 2014, which is hereby incorporated byreference herein in its entirety.

What is claimed is:
 1. An information processing system comprising: adevice including a circuit to perform a configuration of a logic circuitaccording to circuit information; a first control unit configured toinstruct the device to perform the configuration prior to or afterreceiving a configuration request for the configuration, the firstcontrol unit being connected to the device; and a second control unitseparate from and different than the first control unit and configuredto transmit, to the first control unit, the configuration requestcorresponding to a job request for a job of the second control unitafter determining the configuration is necessary based on the jobrequest, the second control unit being connected to the device, whereinthe first control unit instructs the device after determining theconfiguration is necessary based on the configuration request, andwherein the second control unit processes the job using the configuredlogic circuit in the device.
 2. The information processing systemaccording to claim 1, further comprising a storage unit connected to thefirst control unit and configured to store the circuit information. 3.The information processing system according to claim 1, wherein thefirst control unit does not perform the configuration according to thecircuit information from the second control unit.
 4. The informationprocessing system according to claim 1, wherein the device includes afirst communication unit configured to receive data from the firstcontrol unit, the first communication unit being connected to the firstcontrol unit via a first communication path, and a second communicationunit configured to receive data from the second control unit, the secondcommunication unit being connected to the second control unit via asecond communication path, wherein the first control unit is configuredto transmit the circuit information to the first communication unit viathe first communication path, and wherein the second control unit isconfigured to transmit data to be processed by the logic circuit to thesecond communication unit via the second communication path inprocessing of the job.
 5. The information processing system according toclaim 4, wherein the first control unit is configured to updateconfiguration information after all information for identifying thecircuit information is checked, and transmit a completion notificationto the second control unit.
 6. The information processing systemaccording to claim 4, wherein the first control unit transmits aninstruction to configure a logic circuit to the device via the firstcommunication path, and wherein the second control unit does nottransmit an instruction to configure a logic circuit to the device viathe second communication path.
 7. The information processing systemaccording to claim 4, wherein the first communication path is a firstPCI Express bus, and wherein the second communication path is a secondPCI Express bus.
 8. The information processing system according to claim1, wherein the second control unit transmits to the first control unit arequest to transmit second circuit information to the device toconfigure a second logic circuit in the circuit, and wherein the firstcontrol unit transmits the second circuit information to the deviceaccording to reception of the request from the second control unit. 9.The information processing system according to claim 8, wherein therequest includes information for identifying the second circuitinformation.
 10. The information processing system according to claim 9,wherein the first control unit transmits the second circuit informationbased on information indicating a logic circuit configured in thecircuit.
 11. The information processing system according to claim 8,wherein the second control unit transmits the request to the firstcontrol unit according to detection of occurrence of the job.
 12. Theinformation processing system according to claim 1, wherein the firstcontrol unit transmits the circuit information to the device before thejob occurs.
 13. The information processing system according to claim 12,wherein the first control unit identifies at least a piece of circuitinformation among a plurality of pieces of circuit information based ona state of the information processing system, and transmits theidentified circuit information to the device as the circuit information.14. The information processing system according to claim 13, furthercomprising: a storage unit configured to store information indicatingassociation between the state of the information processing system andpredetermined circuit information; and a checking unit configured tocheck the state of the information processing system, wherein the firstcontrol unit transmits the circuit information identified based on thechecked state and the information indicating the association, to thedevice as the circuit information.
 15. The information processing systemaccording to claim 13, wherein the first control unit transmits thecircuit information to the device based on a transition of a state ofthe information processing system.
 16. The information processing systemaccording to claim 15, wherein the first control unit transmits thecircuit information to the device based on the transition of the stateof the information processing system from a first power consumptionstate to a second power consumption state, the second power consumptionstate being a state in which power consumption is lower than in thefirst power consumption state.
 17. The information processing systemaccording to claim 15, wherein the first control unit transmits thesecond circuit information to the device based on the transition of thestate of the information processing system from a state where theprocessing of the job is in process to a state where the processing ofthe job is completed.
 18. The information processing system according toclaim 1, wherein the first control unit checks a logic circuitconfigured in the circuit, and transmits second circuit information tothe device based on a result of the checking.
 19. The informationprocessing system according to claim 18, wherein the first control unitis configured to, if the result of the checking indicates that a logiccircuit corresponding to the circuit information is already configuredin the circuit and is usable by the second control unit, not transmitthe circuit information to the device, and if the result of the checkingindicates that the logic circuit corresponding to the circuitinformation is already configured in the circuit and is not usable bythe second control unit, transmit the circuit information to the device.20. The information processing system according to claim 1, wherein thedevice is a field programmable gate array (FPGA) or a complexprogrammable logic device (CPLD).
 21. An information processing systemcomprising: a first control unit configured to obtain information foridentifying circuit information upon receiving a configuration requestfor a configuration and transmit the circuit information identifiedbased on the obtained information; a programmable logic deviceconfigured to receive the circuit information transmitted from the firstcontrol unit and perform the configuration of a logic circuit accordingto the circuit information; and a second control unit separate from anddifferent than the first control unit and configured to generate, to thefirst control unit, the configuration request corresponding to a jobrequest for a job of the second control unit after determining theconfiguration is necessary based on the job request and upon detectingthe job and process the job using the logic circuit configured by theprogrammable logic device.